The Effect of Phosphorus Incorporation into SiO2/4H-SiC (0001) Interface on Electrophysical Properties of MOS Structure

K. Króla,b, P. Konarskib, M. Miśnikb, M. Sochackia and J. Szmidta aInstitute of Micro- and Optoelectronics, Warsaw University of Technology, Koszykowa 75, 00-662 Warszawa, Poland bTele- and Radio Research Institute, Ratuszowa 11, 03-450 Warszawa, Poland

Full Text PDF

This paper describes the influence of phosphorus incorporation into SiO2/4H-SiC system. The main scope is an analysis of the slow responding trap states (near interface traps) since the influence of phosphorus technology on fast traps has already been investigated by numerous research groups. Two different phosphorus incorporation methods were incorporated - the diffusion-based process of POCl3 annealing and ion implantation. We have shown that regardless of method used a new distinct near interface trap center can be found located approximately at EV + 3.0 eV. This trap can be related to the incorporated phosphorus amount as shown through secondary ion mass spectroscopy measurements.

DOI: 10.12693/APhysPolA.126.1100 PACS numbers: 81.16.Pr, 77.84.Bw, 77.55.Dj