Analysis of Signals Pre-processing Algorithm in Case of Hardware and Software Implementation on Diagnostic Programmable Device PUD-2

D. Dąbrowski and W. Cioch AGH - University of Science and Technology, Faculty of Mechanical Engineering and Robotics, Department of Mechanics and Vibroacoustics, al. A. Mickiewicza 30, 30-059 Krakow, Poland

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In the paper, two-stage signal pre-processing algorithm based on the filtration is presented. The developed algorithm is dedicated for the diagnostic programmable device PUD-2. The PUD-2 is the real-time analyzer based on programmable logic devices FPGA, as well as on ARM processor. Application of FPGA programmable devices and ARM processors allows to merge advantages of hardware and software implementations. Further, analysis of digital filters parameters in case of its efficient realization on the FPGA is presented. The aim of the study is to select digital-filter parameters in such way that the available resources of FPGA are used efficiently and filter characteristics meet established criteria. In the study, low pass finite impulse response and infinite impulse response filters are compared. For the first stage of the signal pre-processing algorithm, hardware implementation of the infinite impulse response filter is proposed, contrary to the second stage, where software realization of the finite impulse response filter is suggested. Combination of hardware and software filtration algorithms allows for fast and efficient realization of signal pre-processing algorithm used in analysis carried out on the PUD-2.

DOI: 10.12693/APhysPolA.123.1020 PACS numbers: 46.80.+j, 46.40.-f