Settling Time Testing of Fast DACs |
| R. Kvedaras, V. Kvedaras and T. Ustinavicius
Electronics Faculty, Vilnius Gediminas Technical University, Vilnius, Lithuania |
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| New specialized sampling converter for signal timescale transformation and algorithm of digital signal processing for automated measurement of settling times of fast digital-to-analogue converters is represented. The new sampling device with numerically controlled oscillators allows us realization of different types of the timescale transformation. Usage of ΣΔ analogue-to-digital converter and first-in first-out memory allows us significant simplification of the device. The equations of timescale transformation ratio and sampling step are presented. A method using a brick-wall comb filter in frequency domain to filter measurement signal has been developed. It is shown that such filtering allows us significant reduction of noise of measurement signal. A new method and algorithm using a brick-wall comb filter and averaging of filtered signal has been developed. Results of the research of developed digital signal processing algorithm are submitted. |
| DOI: 10.12693/APhysPolA.119.521 PACS numbers: 07.05.Dz, 07.05.Hd, 07.05.Kf, 07.05.Tp |